\doxysection{stm32h7xx\+\_\+ll\+\_\+pwr.\+h}
\hypertarget{stm32h7xx__ll__pwr_8h_source}{}\label{stm32h7xx__ll__pwr_8h_source}\index{C:/Users/ASUS/Desktop/dm-\/ctrlH7-\/balance-\/9025test/Drivers/STM32H7xx\_HAL\_Driver/Inc/stm32h7xx\_ll\_pwr.h@{C:/Users/ASUS/Desktop/dm-\/ctrlH7-\/balance-\/9025test/Drivers/STM32H7xx\_HAL\_Driver/Inc/stm32h7xx\_ll\_pwr.h}}
\mbox{\hyperlink{stm32h7xx__ll__pwr_8h}{Go to the documentation of this file.}}
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\DoxyCodeLine{00216\ \textcolor{preprocessor}{\#define\ LL\_PWR\_REGU\_VOLTAGE\_SVOS\_SCALE3\ \ \ (PWR\_CR1\_SVOS\_0\ |\ PWR\_CR1\_SVOS\_1)\ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00220\ }
\DoxyCodeLine{00224\ \textcolor{preprocessor}{\#define\ LL\_PWR\_REGU\_DSMODE\_MAIN\ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ }\textcolor{preprocessor}{}}
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\DoxyCodeLine{00248\ \textcolor{preprocessor}{\#define\ LL\_PWR\_AVDLEVEL\_0\ \ \ PWR\_CR1\_ALS\_LEV0\ \ }\textcolor{preprocessor}{}}
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\DoxyCodeLine{00252\ }
\DoxyCodeLine{00256\ }
\DoxyCodeLine{00260\ \textcolor{preprocessor}{\#define\ LL\_PWR\_BATT\_CHARG\_RESISTOR\_5K\ \ \ \ \ 0x00000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00261\ \textcolor{preprocessor}{\#define\ LL\_PWR\_BATT\_CHARGRESISTOR\_1\_5K\ \ \ \ PWR\_CR3\_VBRS\ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
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\DoxyCodeLine{00269\ \textcolor{preprocessor}{\#define\ LL\_PWR\_WAKEUP\_PIN1\ \ \ \ PWR\_WKUPEPR\_WKUPEN1\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00270\ \textcolor{preprocessor}{\#define\ LL\_PWR\_WAKEUP\_PIN2\ \ \ \ PWR\_WKUPEPR\_WKUPEN2\ \ }\textcolor{preprocessor}{}}
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\DoxyCodeLine{00277\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ defined\ (PWR\_WKUPEPR\_WKUPEN5)\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00278\ \textcolor{preprocessor}{\#define\ LL\_PWR\_WAKEUP\_PIN6\ \ \ \ PWR\_WKUPEPR\_WKUPEN6\ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
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\DoxyCodeLine{00287\ \textcolor{preprocessor}{\#define\ LL\_PWR\_WAKEUP\_PIN\_PULLUP\ \ \ \ \ \ 0x00000001UL\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00288\ \textcolor{preprocessor}{\#define\ LL\_PWR\_WAKEUP\_PIN\_PULLDOWN\ \ \ \ 0x00000002UL\ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00292\ }
\DoxyCodeLine{00296\ \textcolor{preprocessor}{\#define\ LL\_PWR\_LDO\_SUPPLY\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ PWR\_CR3\_LDOEN\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00297\ \textcolor{preprocessor}{\#if\ defined\ (SMPS)}}
\DoxyCodeLine{00298\ \textcolor{preprocessor}{\#define\ LL\_PWR\_DIRECT\_SMPS\_SUPPLY\ \ \ \ \ \ \ \ \ \ \ \ \ PWR\_CR3\_SMPSEN\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00299\ \textcolor{preprocessor}{\#define\ LL\_PWR\_SMPS\_1V8\_SUPPLIES\_LDO\ \ \ \ \ \ \ \ \ \ (PWR\_CR3\_SMPSLEVEL\_0\ |\ PWR\_CR3\_SMPSEN\ |\ PWR\_CR3\_LDOEN)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00300\ \textcolor{preprocessor}{\#define\ LL\_PWR\_SMPS\_2V5\_SUPPLIES\_LDO\ \ \ \ \ \ \ \ \ \ (PWR\_CR3\_SMPSLEVEL\_1\ |\ PWR\_CR3\_SMPSEN\ |\ PWR\_CR3\_LDOEN)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00301\ \textcolor{preprocessor}{\#define\ LL\_PWR\_SMPS\_1V8\_SUPPLIES\_EXT\_AND\_LDO\ \ (PWR\_CR3\_SMPSLEVEL\_0\ |\ PWR\_CR3\_SMPSEXTHP\ |\ PWR\_CR3\_SMPSEN\ |\ PWR\_CR3\_LDOEN)\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00302\ \textcolor{preprocessor}{\#define\ LL\_PWR\_SMPS\_2V5\_SUPPLIES\_EXT\_AND\_LDO\ \ (PWR\_CR3\_SMPSLEVEL\_1\ |\ PWR\_CR3\_SMPSEXTHP\ |\ PWR\_CR3\_SMPSEN\ |\ PWR\_CR3\_LDOEN)\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00303\ \textcolor{preprocessor}{\#define\ LL\_PWR\_SMPS\_1V8\_SUPPLIES\_EXT\ \ \ \ \ \ \ \ \ \ (PWR\_CR3\_SMPSLEVEL\_0\ |\ PWR\_CR3\_SMPSEXTHP\ |\ PWR\_CR3\_SMPSEN\ |\ PWR\_CR3\_BYPASS)\ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00304\ \textcolor{preprocessor}{\#define\ LL\_PWR\_SMPS\_2V5\_SUPPLIES\_EXT\ \ \ \ \ \ \ \ \ \ (PWR\_CR3\_SMPSLEVEL\_1\ |\ PWR\_CR3\_SMPSEXTHP\ |\ PWR\_CR3\_SMPSEN\ |\ PWR\_CR3\_BYPASS)\ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00305\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ SMPS\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00306\ \textcolor{preprocessor}{\#define\ LL\_PWR\_EXTERNAL\_SOURCE\_SUPPLY\ \ \ \ \ \ \ \ \ PWR\_CR3\_BYPASS\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00310\ }
\DoxyCodeLine{00314\ \textcolor{comment}{/*\ Exported\ macro\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00318\ }
\DoxyCodeLine{00322\ }
\DoxyCodeLine{00329\ \textcolor{preprocessor}{\#define\ LL\_PWR\_WriteReg(\_\_REG\_\_,\ \_\_VALUE\_\_)\ WRITE\_REG(PWR-\/>\_\_REG\_\_,\ (\_\_VALUE\_\_))}}
\DoxyCodeLine{00330\ }
\DoxyCodeLine{00336\ \textcolor{preprocessor}{\#define\ LL\_PWR\_ReadReg(\_\_REG\_\_)\ READ\_REG(PWR-\/>\_\_REG\_\_)}\textcolor{preprocessor}{}}
\DoxyCodeLine{00340\ }
\DoxyCodeLine{00344\ \textcolor{comment}{/*\ Exported\ functions\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00348\ }
\DoxyCodeLine{00352\ }
\DoxyCodeLine{00361\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_SetRegulModeDS(uint32\_t\ RegulMode)}
\DoxyCodeLine{00362\ \{}
\DoxyCodeLine{00363\ \ \ MODIFY\_REG(PWR-\/>CR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacc60f674740c4000a25b0e3e50ede47d}{PWR\_CR1\_LPDS}},\ RegulMode);}
\DoxyCodeLine{00364\ \}}
\DoxyCodeLine{00365\ }
\DoxyCodeLine{00373\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_GetRegulModeDS(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00374\ \{}
\DoxyCodeLine{00375\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(PWR-\/>CR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacc60f674740c4000a25b0e3e50ede47d}{PWR\_CR1\_LPDS}}));}
\DoxyCodeLine{00376\ \}}
\DoxyCodeLine{00377\ }
\DoxyCodeLine{00383\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_EnablePVD(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00384\ \{}
\DoxyCodeLine{00385\ \ \ SET\_BIT(PWR-\/>CR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8d2a44a38ed8ca33fdf883344065bd2}{PWR\_CR1\_PVDEN}});}
\DoxyCodeLine{00386\ \}}
\DoxyCodeLine{00387\ }
\DoxyCodeLine{00393\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_DisablePVD(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00394\ \{}
\DoxyCodeLine{00395\ \ \ CLEAR\_BIT(PWR-\/>CR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8d2a44a38ed8ca33fdf883344065bd2}{PWR\_CR1\_PVDEN}});}
\DoxyCodeLine{00396\ \}}
\DoxyCodeLine{00397\ }
\DoxyCodeLine{00403\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsEnabledPVD(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00404\ \{}
\DoxyCodeLine{00405\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8d2a44a38ed8ca33fdf883344065bd2}{PWR\_CR1\_PVDEN}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8d2a44a38ed8ca33fdf883344065bd2}{PWR\_CR1\_PVDEN}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00406\ \}}
\DoxyCodeLine{00407\ }
\DoxyCodeLine{00422\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_SetPVDLevel(uint32\_t\ PVDLevel)}
\DoxyCodeLine{00423\ \{}
\DoxyCodeLine{00424\ \ \ MODIFY\_REG(PWR-\/>CR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf8de82702acc1034f6061ed9d70ec67f}{PWR\_CR1\_PLS}},\ PVDLevel);}
\DoxyCodeLine{00425\ \}}
\DoxyCodeLine{00426\ }
\DoxyCodeLine{00440\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_GetPVDLevel(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00441\ \{}
\DoxyCodeLine{00442\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(PWR-\/>CR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf8de82702acc1034f6061ed9d70ec67f}{PWR\_CR1\_PLS}}));}
\DoxyCodeLine{00443\ \}}
\DoxyCodeLine{00444\ }
\DoxyCodeLine{00450\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_EnableBkUpAccess(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00451\ \{}
\DoxyCodeLine{00452\ \ \ SET\_BIT(PWR-\/>CR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga09950f76d292eb9d01f72dd825082f1b}{PWR\_CR1\_DBP}});}
\DoxyCodeLine{00453\ \}}
\DoxyCodeLine{00454\ }
\DoxyCodeLine{00460\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_DisableBkUpAccess(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00461\ \{}
\DoxyCodeLine{00462\ \ \ CLEAR\_BIT(PWR-\/>CR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga09950f76d292eb9d01f72dd825082f1b}{PWR\_CR1\_DBP}});}
\DoxyCodeLine{00463\ \}}
\DoxyCodeLine{00464\ }
\DoxyCodeLine{00470\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsEnabledBkUpAccess(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00471\ \{}
\DoxyCodeLine{00472\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga09950f76d292eb9d01f72dd825082f1b}{PWR\_CR1\_DBP}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga09950f76d292eb9d01f72dd825082f1b}{PWR\_CR1\_DBP}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00473\ \}}
\DoxyCodeLine{00474\ }
\DoxyCodeLine{00480\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_EnableFlashPowerDown(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00481\ \{}
\DoxyCodeLine{00482\ \ \ SET\_BIT(PWR-\/>CR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga26543bcca0e8dac03aaa2acd0afd4e2c}{PWR\_CR1\_FLPS}});}
\DoxyCodeLine{00483\ \}}
\DoxyCodeLine{00484\ }
\DoxyCodeLine{00490\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_DisableFlashPowerDown(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00491\ \{}
\DoxyCodeLine{00492\ \ \ CLEAR\_BIT(PWR-\/>CR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga26543bcca0e8dac03aaa2acd0afd4e2c}{PWR\_CR1\_FLPS}});}
\DoxyCodeLine{00493\ \}}
\DoxyCodeLine{00494\ }
\DoxyCodeLine{00500\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsEnabledFlashPowerDown(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00501\ \{}
\DoxyCodeLine{00502\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga26543bcca0e8dac03aaa2acd0afd4e2c}{PWR\_CR1\_FLPS}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga26543bcca0e8dac03aaa2acd0afd4e2c}{PWR\_CR1\_FLPS}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00503\ \}}
\DoxyCodeLine{00504\ }
\DoxyCodeLine{00505\ \textcolor{preprocessor}{\#if\ defined\ (PWR\_CR1\_BOOSTE)}\textcolor{preprocessor}{}}
\DoxyCodeLine{00511\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_EnableAnalogBooster(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00512\ \{}
\DoxyCodeLine{00513\ \ \ SET\_BIT(PWR-\/>CR1,\ PWR\_CR1\_BOOSTE);}
\DoxyCodeLine{00514\ \}}
\DoxyCodeLine{00515\ }
\DoxyCodeLine{00521\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_DisableAnalogBooster(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00522\ \{}
\DoxyCodeLine{00523\ \ \ CLEAR\_BIT(PWR-\/>CR1,\ PWR\_CR1\_BOOSTE);}
\DoxyCodeLine{00524\ \}}
\DoxyCodeLine{00525\ }
\DoxyCodeLine{00531\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsEnabledAnalogBooster(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00532\ \{}
\DoxyCodeLine{00533\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR1,\ PWR\_CR1\_BOOSTE)\ ==\ (PWR\_CR1\_BOOSTE))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00534\ \}}
\DoxyCodeLine{00535\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CR1\_BOOSTE\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00536\ }
\DoxyCodeLine{00537\ \textcolor{preprocessor}{\#if\ defined\ (PWR\_CR1\_AVD\_READY)}\textcolor{preprocessor}{}}
\DoxyCodeLine{00543\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_EnableAnalogVoltageReady(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00544\ \{}
\DoxyCodeLine{00545\ \ \ SET\_BIT(PWR-\/>CR1,\ PWR\_CR1\_AVD\_READY);}
\DoxyCodeLine{00546\ \}}
\DoxyCodeLine{00547\ }
\DoxyCodeLine{00553\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_DisableAnalogVoltageReady(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00554\ \{}
\DoxyCodeLine{00555\ \ \ CLEAR\_BIT(PWR-\/>CR1,\ PWR\_CR1\_AVD\_READY);}
\DoxyCodeLine{00556\ \}}
\DoxyCodeLine{00557\ }
\DoxyCodeLine{00563\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsEnabledAnalogVoltageReady(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00564\ \{}
\DoxyCodeLine{00565\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR1,\ PWR\_CR1\_AVD\_READY)\ ==\ (PWR\_CR1\_AVD\_READY))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00566\ \}}
\DoxyCodeLine{00567\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CR1\_AVD\_READY\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00568\ }
\DoxyCodeLine{00578\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_SetStopModeRegulVoltageScaling(uint32\_t\ VoltageScaling)}
\DoxyCodeLine{00579\ \{}
\DoxyCodeLine{00580\ \ \ MODIFY\_REG(PWR-\/>CR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2d0305ff376903b25be0c2b855b54766}{PWR\_CR1\_SVOS}},\ VoltageScaling);}
\DoxyCodeLine{00581\ \}}
\DoxyCodeLine{00582\ }
\DoxyCodeLine{00591\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_GetStopModeRegulVoltageScaling(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00592\ \{}
\DoxyCodeLine{00593\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(PWR-\/>CR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2d0305ff376903b25be0c2b855b54766}{PWR\_CR1\_SVOS}}));}
\DoxyCodeLine{00594\ \}}
\DoxyCodeLine{00595\ }
\DoxyCodeLine{00601\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_EnableAVD(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00602\ \{}
\DoxyCodeLine{00603\ \ \ SET\_BIT(PWR-\/>CR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae5d3657986e2d92c7f5f72f4422b0a52}{PWR\_CR1\_AVDEN}});}
\DoxyCodeLine{00604\ \}}
\DoxyCodeLine{00605\ }
\DoxyCodeLine{00611\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_DisableAVD(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00612\ \{}
\DoxyCodeLine{00613\ \ \ CLEAR\_BIT(PWR-\/>CR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae5d3657986e2d92c7f5f72f4422b0a52}{PWR\_CR1\_AVDEN}});}
\DoxyCodeLine{00614\ \}}
\DoxyCodeLine{00615\ }
\DoxyCodeLine{00621\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsEnabledAVD(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00622\ \{}
\DoxyCodeLine{00623\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae5d3657986e2d92c7f5f72f4422b0a52}{PWR\_CR1\_AVDEN}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gae5d3657986e2d92c7f5f72f4422b0a52}{PWR\_CR1\_AVDEN}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00624\ \}}
\DoxyCodeLine{00625\ }
\DoxyCodeLine{00636\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_SetAVDLevel(uint32\_t\ AVDLevel)}
\DoxyCodeLine{00637\ \{}
\DoxyCodeLine{00638\ \ \ MODIFY\_REG(PWR-\/>CR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga52667346e07a0e002e149f8e5424f44d}{PWR\_CR1\_ALS}},\ AVDLevel);}
\DoxyCodeLine{00639\ \}}
\DoxyCodeLine{00640\ }
\DoxyCodeLine{00650\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_GetAVDLevel(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00651\ \{}
\DoxyCodeLine{00652\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(PWR-\/>CR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga52667346e07a0e002e149f8e5424f44d}{PWR\_CR1\_ALS}}));}
\DoxyCodeLine{00653\ \}}
\DoxyCodeLine{00654\ }
\DoxyCodeLine{00655\ \textcolor{preprocessor}{\#if\ defined\ (PWR\_CR1\_AXIRAM1SO)}\textcolor{preprocessor}{}}
\DoxyCodeLine{00661\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_EnableAXIRAM1ShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00662\ \{}
\DoxyCodeLine{00663\ \ \ SET\_BIT(PWR-\/>CR1,\ PWR\_CR1\_AXIRAM1SO);}
\DoxyCodeLine{00664\ \}}
\DoxyCodeLine{00665\ }
\DoxyCodeLine{00671\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_DisableAXIRAM1ShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00672\ \{}
\DoxyCodeLine{00673\ \ \ CLEAR\_BIT(PWR-\/>CR1,\ PWR\_CR1\_AXIRAM1SO);}
\DoxyCodeLine{00674\ \}}
\DoxyCodeLine{00675\ }
\DoxyCodeLine{00681\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsEnabledAXIRAM1ShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00682\ \{}
\DoxyCodeLine{00683\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR1,\ PWR\_CR1\_AXIRAM1SO)\ ==\ (PWR\_CR1\_AXIRAM1SO))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00684\ \}}
\DoxyCodeLine{00685\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CR1\_AXIRAM1SO\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00686\ }
\DoxyCodeLine{00687\ \textcolor{preprocessor}{\#if\ defined\ (PWR\_CR1\_AXIRAM2SO)}\textcolor{preprocessor}{}}
\DoxyCodeLine{00693\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_EnableAXIRAM2ShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00694\ \{}
\DoxyCodeLine{00695\ \ \ SET\_BIT(PWR-\/>CR1,\ PWR\_CR1\_AXIRAM2SO);}
\DoxyCodeLine{00696\ \}}
\DoxyCodeLine{00697\ }
\DoxyCodeLine{00703\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_DisableAXIRAM2ShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00704\ \{}
\DoxyCodeLine{00705\ \ \ CLEAR\_BIT(PWR-\/>CR1,\ PWR\_CR1\_AXIRAM2SO);}
\DoxyCodeLine{00706\ \}}
\DoxyCodeLine{00707\ }
\DoxyCodeLine{00713\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsEnabledAXIRAM2ShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00714\ \{}
\DoxyCodeLine{00715\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR1,\ PWR\_CR1\_AXIRAM2SO)\ ==\ (PWR\_CR1\_AXIRAM2SO))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00716\ \}}
\DoxyCodeLine{00717\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CR1\_AXIRAM2SO\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00718\ }
\DoxyCodeLine{00719\ \textcolor{preprocessor}{\#if\ defined\ (PWR\_CR1\_AXIRAM3SO)}\textcolor{preprocessor}{}}
\DoxyCodeLine{00725\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_EnableAXIRAM3ShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00726\ \{}
\DoxyCodeLine{00727\ \ \ SET\_BIT(PWR-\/>CR1,\ PWR\_CR1\_AXIRAM3SO);}
\DoxyCodeLine{00728\ \}}
\DoxyCodeLine{00729\ }
\DoxyCodeLine{00735\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_DisableAXIRAM3ShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00736\ \{}
\DoxyCodeLine{00737\ \ \ CLEAR\_BIT(PWR-\/>CR1,\ PWR\_CR1\_AXIRAM3SO);}
\DoxyCodeLine{00738\ \}}
\DoxyCodeLine{00739\ }
\DoxyCodeLine{00745\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsEnabledAXIRAM3ShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00746\ \{}
\DoxyCodeLine{00747\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR1,\ PWR\_CR1\_AXIRAM3SO)\ ==\ (PWR\_CR1\_AXIRAM3SO))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00748\ \}}
\DoxyCodeLine{00749\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CR1\_AXIRAM3SO\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00750\ }
\DoxyCodeLine{00751\ \textcolor{preprocessor}{\#if\ defined\ (PWR\_CR1\_AHBRAM1SO)}\textcolor{preprocessor}{}}
\DoxyCodeLine{00757\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_EnableAHBRAM1ShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00758\ \{}
\DoxyCodeLine{00759\ \ \ SET\_BIT(PWR-\/>CR1,\ PWR\_CR1\_AHBRAM1SO);}
\DoxyCodeLine{00760\ \}}
\DoxyCodeLine{00761\ }
\DoxyCodeLine{00767\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_DisableAHBRAM1ShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00768\ \{}
\DoxyCodeLine{00769\ \ \ CLEAR\_BIT(PWR-\/>CR1,\ PWR\_CR1\_AHBRAM1SO);}
\DoxyCodeLine{00770\ \}}
\DoxyCodeLine{00771\ }
\DoxyCodeLine{00777\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsEnabledAHBRAM1ShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00778\ \{}
\DoxyCodeLine{00779\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR1,\ PWR\_CR1\_AHBRAM1SO)\ ==\ (PWR\_CR1\_AHBRAM1SO))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00780\ \}}
\DoxyCodeLine{00781\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CR1\_AHBRAM1SO\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00782\ }
\DoxyCodeLine{00783\ \textcolor{preprocessor}{\#if\ defined\ (PWR\_CR1\_AHBRAM2SO)}\textcolor{preprocessor}{}}
\DoxyCodeLine{00789\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_EnableAHBRAM2ShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00790\ \{}
\DoxyCodeLine{00791\ \ \ SET\_BIT(PWR-\/>CR1,\ PWR\_CR1\_AHBRAM2SO);}
\DoxyCodeLine{00792\ \}}
\DoxyCodeLine{00793\ }
\DoxyCodeLine{00799\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_DisableAHBRAM2ShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00800\ \{}
\DoxyCodeLine{00801\ \ \ CLEAR\_BIT(PWR-\/>CR1,\ PWR\_CR1\_AHBRAM2SO);}
\DoxyCodeLine{00802\ \}}
\DoxyCodeLine{00803\ }
\DoxyCodeLine{00809\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsEnabledAHBRAM2ShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00810\ \{}
\DoxyCodeLine{00811\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR1,\ PWR\_CR1\_AHBRAM2SO)\ ==\ (PWR\_CR1\_AHBRAM2SO))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00812\ \}}
\DoxyCodeLine{00813\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CR1\_AHBRAM2SO\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00814\ }
\DoxyCodeLine{00815\ \textcolor{preprocessor}{\#if\ defined\ (PWR\_CR1\_ITCMSO)}\textcolor{preprocessor}{}}
\DoxyCodeLine{00821\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_EnableITCMSOShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00822\ \{}
\DoxyCodeLine{00823\ \ \ SET\_BIT(PWR-\/>CR1,\ PWR\_CR1\_ITCMSO);}
\DoxyCodeLine{00824\ \}}
\DoxyCodeLine{00825\ }
\DoxyCodeLine{00831\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_DisableITCMSOShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00832\ \{}
\DoxyCodeLine{00833\ \ \ CLEAR\_BIT(PWR-\/>CR1,\ PWR\_CR1\_ITCMSO);}
\DoxyCodeLine{00834\ \}}
\DoxyCodeLine{00835\ }
\DoxyCodeLine{00841\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsEnabledITCMShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00842\ \{}
\DoxyCodeLine{00843\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR1,\ PWR\_CR1\_ITCMSO)\ ==\ (PWR\_CR1\_ITCMSO))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00844\ \}}
\DoxyCodeLine{00845\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CR1\_ITCMSO\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00846\ }
\DoxyCodeLine{00847\ \textcolor{preprocessor}{\#if\ defined\ (PWR\_CR1\_HSITFSO)}\textcolor{preprocessor}{}}
\DoxyCodeLine{00853\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_EnableHSITFShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00854\ \{}
\DoxyCodeLine{00855\ \ \ SET\_BIT(PWR-\/>CR1,\ PWR\_CR1\_HSITFSO);}
\DoxyCodeLine{00856\ \}}
\DoxyCodeLine{00857\ }
\DoxyCodeLine{00863\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_DisableHSITFShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00864\ \{}
\DoxyCodeLine{00865\ \ \ CLEAR\_BIT(PWR-\/>CR1,\ PWR\_CR1\_HSITFSO);}
\DoxyCodeLine{00866\ \}}
\DoxyCodeLine{00867\ }
\DoxyCodeLine{00873\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsEnabledHSITFShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00874\ \{}
\DoxyCodeLine{00875\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR1,\ PWR\_CR1\_HSITFSO)\ ==\ (PWR\_CR1\_HSITFSO))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00876\ \}}
\DoxyCodeLine{00877\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CR1\_HSITFSO\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00878\ }
\DoxyCodeLine{00879\ \textcolor{preprocessor}{\#if\ defined\ (PWR\_CR1\_SRDRAMSO)}\textcolor{preprocessor}{}}
\DoxyCodeLine{00885\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_EnableSRDRAMShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00886\ \{}
\DoxyCodeLine{00887\ \ \ SET\_BIT(PWR-\/>CR1,\ PWR\_CR1\_SRDRAMSO);}
\DoxyCodeLine{00888\ \}}
\DoxyCodeLine{00889\ }
\DoxyCodeLine{00895\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_DisableSRDRAMShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00896\ \{}
\DoxyCodeLine{00897\ \ \ CLEAR\_BIT(PWR-\/>CR1,\ PWR\_CR1\_SRDRAMSO);}
\DoxyCodeLine{00898\ \}}
\DoxyCodeLine{00899\ }
\DoxyCodeLine{00905\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsEnabledSRDRAMShutOff(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00906\ \{}
\DoxyCodeLine{00907\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR1,\ PWR\_CR1\_SRDRAMSO)\ ==\ (PWR\_CR1\_SRDRAMSO))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00908\ \}}
\DoxyCodeLine{00909\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CR1\_SRDRAMSO\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00910\ }
\DoxyCodeLine{00921\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_EnableBkUpRegulator(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00922\ \{}
\DoxyCodeLine{00923\ \ \ SET\_BIT(PWR-\/>CR2,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8387ab1b7dc6a1d8de702c6bc899c620}{PWR\_CR2\_BREN}});}
\DoxyCodeLine{00924\ \}}
\DoxyCodeLine{00925\ }
\DoxyCodeLine{00931\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_DisableBkUpRegulator(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00932\ \{}
\DoxyCodeLine{00933\ \ \ CLEAR\_BIT(PWR-\/>CR2,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8387ab1b7dc6a1d8de702c6bc899c620}{PWR\_CR2\_BREN}});}
\DoxyCodeLine{00934\ \}}
\DoxyCodeLine{00935\ }
\DoxyCodeLine{00941\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsEnabledBkUpRegulator(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00942\ \{}
\DoxyCodeLine{00943\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR2,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8387ab1b7dc6a1d8de702c6bc899c620}{PWR\_CR2\_BREN}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8387ab1b7dc6a1d8de702c6bc899c620}{PWR\_CR2\_BREN}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00944\ \}}
\DoxyCodeLine{00945\ }
\DoxyCodeLine{00951\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_EnableMonitoring(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00952\ \{}
\DoxyCodeLine{00953\ \ \ SET\_BIT(PWR-\/>CR2,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga732609af3be64eef8c4c243ce7f1f46c}{PWR\_CR2\_MONEN}});}
\DoxyCodeLine{00954\ \}}
\DoxyCodeLine{00955\ }
\DoxyCodeLine{00961\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_DisableMonitoring(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00962\ \{}
\DoxyCodeLine{00963\ \ \ CLEAR\_BIT(PWR-\/>CR2,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga732609af3be64eef8c4c243ce7f1f46c}{PWR\_CR2\_MONEN}});}
\DoxyCodeLine{00964\ \}}
\DoxyCodeLine{00965\ }
\DoxyCodeLine{00971\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsEnabledMonitoring(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00972\ \{}
\DoxyCodeLine{00973\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR2,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga732609af3be64eef8c4c243ce7f1f46c}{PWR\_CR2\_MONEN}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga732609af3be64eef8c4c243ce7f1f46c}{PWR\_CR2\_MONEN}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00974\ \}}
\DoxyCodeLine{00975\ }
\DoxyCodeLine{00976\ \textcolor{preprocessor}{\#if\ defined\ (SMPS)}\textcolor{preprocessor}{}}
\DoxyCodeLine{00996\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_ConfigSupply(uint32\_t\ SupplySource)}
\DoxyCodeLine{00997\ \{}
\DoxyCodeLine{00998\ \ \ \textcolor{comment}{/*\ Set\ the\ power\ supply\ configuration\ */}}
\DoxyCodeLine{00999\ \ \ MODIFY\_REG(PWR-\/>CR3,\ (PWR\_CR3\_SMPSLEVEL\ |\ PWR\_CR3\_SMPSEXTHP\ |\ PWR\_CR3\_SMPSEN\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2e5832efbbab5ab98c031bdb891a7977}{PWR\_CR3\_LDOEN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga18df5e5c7aaa92d19eb53be04121d143}{PWR\_CR3\_BYPASS}}),\ SupplySource);}
\DoxyCodeLine{01000\ \}}
\DoxyCodeLine{01001\ \textcolor{preprocessor}{\#else}\textcolor{preprocessor}{}}
\DoxyCodeLine{01012\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_ConfigSupply(uint32\_t\ SupplySource)}
\DoxyCodeLine{01013\ \{}
\DoxyCodeLine{01014\ \ \ \textcolor{comment}{/*\ Set\ the\ power\ supply\ configuration\ */}}
\DoxyCodeLine{01015\ \ \ MODIFY\_REG(PWR-\/>CR3,\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf5a8423dbc59c5572057861d59115222}{PWR\_CR3\_SCUEN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2e5832efbbab5ab98c031bdb891a7977}{PWR\_CR3\_LDOEN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga18df5e5c7aaa92d19eb53be04121d143}{PWR\_CR3\_BYPASS}}),\ SupplySource);}
\DoxyCodeLine{01016\ \}}
\DoxyCodeLine{01017\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ defined\ (SMPS)\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{01018\ }
\DoxyCodeLine{01019\ \textcolor{preprocessor}{\#if\ defined\ (SMPS)}\textcolor{preprocessor}{}}
\DoxyCodeLine{01038\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_GetSupply(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01039\ \{}
\DoxyCodeLine{01040\ \ \ \textcolor{comment}{/*\ Get\ the\ power\ supply\ configuration\ */}}
\DoxyCodeLine{01041\ \ \ \textcolor{keywordflow}{return}(uint32\_t)(READ\_BIT(PWR-\/>CR3,\ (PWR\_CR3\_SMPSLEVEL\ |\ PWR\_CR3\_SMPSEXTHP\ |\ PWR\_CR3\_SMPSEN\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2e5832efbbab5ab98c031bdb891a7977}{PWR\_CR3\_LDOEN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga18df5e5c7aaa92d19eb53be04121d143}{PWR\_CR3\_BYPASS}})));}
\DoxyCodeLine{01042\ \}}
\DoxyCodeLine{01043\ \textcolor{preprocessor}{\#else}\textcolor{preprocessor}{}}
\DoxyCodeLine{01053\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_GetSupply(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01054\ \{}
\DoxyCodeLine{01055\ \ \ \textcolor{comment}{/*\ Get\ the\ power\ supply\ configuration\ */}}
\DoxyCodeLine{01056\ \ \ \textcolor{keywordflow}{return}(uint32\_t)(READ\_BIT(PWR-\/>CR3,\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf5a8423dbc59c5572057861d59115222}{PWR\_CR3\_SCUEN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2e5832efbbab5ab98c031bdb891a7977}{PWR\_CR3\_LDOEN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga18df5e5c7aaa92d19eb53be04121d143}{PWR\_CR3\_BYPASS}})));}
\DoxyCodeLine{01057\ \}}
\DoxyCodeLine{01058\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ defined\ (SMPS)\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{01059\ }
\DoxyCodeLine{01065\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_EnableBatteryCharging(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01066\ \{}
\DoxyCodeLine{01067\ \ \ SET\_BIT(PWR-\/>CR3,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaabba4222905284bb54d6f5157883c30b}{PWR\_CR3\_VBE}});}
\DoxyCodeLine{01068\ \}}
\DoxyCodeLine{01069\ }
\DoxyCodeLine{01075\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_DisableBatteryCharging(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01076\ \{}
\DoxyCodeLine{01077\ \ \ CLEAR\_BIT(PWR-\/>CR3,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaabba4222905284bb54d6f5157883c30b}{PWR\_CR3\_VBE}});}
\DoxyCodeLine{01078\ \}}
\DoxyCodeLine{01079\ }
\DoxyCodeLine{01085\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsEnabledBatteryCharging(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01086\ \{}
\DoxyCodeLine{01087\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR3,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaabba4222905284bb54d6f5157883c30b}{PWR\_CR3\_VBE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaabba4222905284bb54d6f5157883c30b}{PWR\_CR3\_VBE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01088\ \}}
\DoxyCodeLine{01089\ }
\DoxyCodeLine{01098\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_SetBattChargResistor(uint32\_t\ Resistor)}
\DoxyCodeLine{01099\ \{}
\DoxyCodeLine{01100\ \ \ MODIFY\_REG(PWR-\/>CR3,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga21807d08cdbb2fbd8f42b731a5d528ce}{PWR\_CR3\_VBRS}},\ Resistor);}
\DoxyCodeLine{01101\ \}}
\DoxyCodeLine{01102\ }
\DoxyCodeLine{01110\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_GetBattChargResistor(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01111\ \{}
\DoxyCodeLine{01112\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(PWR-\/>CR3,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga21807d08cdbb2fbd8f42b731a5d528ce}{PWR\_CR3\_VBRS}}));}
\DoxyCodeLine{01113\ \}}
\DoxyCodeLine{01114\ }
\DoxyCodeLine{01120\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_EnableUSBReg(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01121\ \{}
\DoxyCodeLine{01122\ \ \ SET\_BIT(PWR-\/>CR3,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacdb4aff167de72e6d0b786abc6d9e45f}{PWR\_CR3\_USBREGEN}});}
\DoxyCodeLine{01123\ \}}
\DoxyCodeLine{01124\ }
\DoxyCodeLine{01130\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_DisableUSBReg(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01131\ \{}
\DoxyCodeLine{01132\ \ \ CLEAR\_BIT(PWR-\/>CR3,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacdb4aff167de72e6d0b786abc6d9e45f}{PWR\_CR3\_USBREGEN}});}
\DoxyCodeLine{01133\ \}}
\DoxyCodeLine{01134\ }
\DoxyCodeLine{01140\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsEnabledUSBReg(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01141\ \{}
\DoxyCodeLine{01142\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR3,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacdb4aff167de72e6d0b786abc6d9e45f}{PWR\_CR3\_USBREGEN}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gacdb4aff167de72e6d0b786abc6d9e45f}{PWR\_CR3\_USBREGEN}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01143\ \}}
\DoxyCodeLine{01144\ }
\DoxyCodeLine{01150\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_EnableUSBVoltageDetector(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01151\ \{}
\DoxyCodeLine{01152\ \ \ SET\_BIT(PWR-\/>CR3,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga40d45cbf0931adfbbca0af29a7740151}{PWR\_CR3\_USB33DEN}});}
\DoxyCodeLine{01153\ \}}
\DoxyCodeLine{01154\ }
\DoxyCodeLine{01160\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_DisableUSBVoltageDetector(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01161\ \{}
\DoxyCodeLine{01162\ \ \ CLEAR\_BIT(PWR-\/>CR3,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga40d45cbf0931adfbbca0af29a7740151}{PWR\_CR3\_USB33DEN}});}
\DoxyCodeLine{01163\ \}}
\DoxyCodeLine{01164\ }
\DoxyCodeLine{01170\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsEnabledUSBVoltageDetector(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01171\ \{}
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\DoxyCodeLine{01173\ \}}
\DoxyCodeLine{01174\ }
\DoxyCodeLine{01175\ \textcolor{preprocessor}{\#if\ defined\ (PWR\_CPUCR\_PDDS\_D2)}\textcolor{preprocessor}{}}
\DoxyCodeLine{01184\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_CPU\_SetD1PowerMode(uint32\_t\ PDMode)}
\DoxyCodeLine{01185\ \{}
\DoxyCodeLine{01186\ \ \ MODIFY\_REG(PWR-\/>CPUCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga49eefe139ecdaf7012ae122292f9f2b2}{PWR\_CPUCR\_PDDS\_D1}},\ PDMode);}
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\DoxyCodeLine{01197\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_CPU\_SetCDPowerMode(uint32\_t\ PDMode)}
\DoxyCodeLine{01198\ \{}
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\DoxyCodeLine{01200\ \}}
\DoxyCodeLine{01201\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CPUCR\_PDDS\_D2\ */}\textcolor{preprocessor}{}}
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\DoxyCodeLine{01212\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_CPU2\_SetD1PowerMode(uint32\_t\ PDMode)}
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\DoxyCodeLine{01228\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(PWR-\/>CPUCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga49eefe139ecdaf7012ae122292f9f2b2}{PWR\_CPUCR\_PDDS\_D1}}));}
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\DoxyCodeLine{01240\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(PWR-\/>CPUCR,\ PWR\_CPUCR\_RETDS\_CD));}
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\DoxyCodeLine{01242\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CPUCR\_PDDS\_D2\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{01243\ }
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\DoxyCodeLine{01256\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ DUAL\_CORE\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{01257\ }
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\DoxyCodeLine{01271\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CPUCR\_PDDS\_D2\ */}\textcolor{preprocessor}{}}
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\DoxyCodeLine{01282\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_CPU2\_SetD2PowerMode(uint32\_t\ PDMode)}
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\DoxyCodeLine{01286\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ DUAL\_CORE\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{01287\ }
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\DoxyCodeLine{01298\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(PWR-\/>CPUCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga1d847c56f1d197f0f0520b432a90ffb9}{PWR\_CPUCR\_PDDS\_D2}}));}
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\DoxyCodeLine{01300\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CPUCR\_PDDS\_D2\ */}\textcolor{preprocessor}{}}
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\DoxyCodeLine{01325\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_CPU\_SetD3PowerMode(uint32\_t\ PDMode)}
\DoxyCodeLine{01326\ \{}
\DoxyCodeLine{01327\ \ \ MODIFY\_REG(PWR-\/>CPUCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7939570e266aa5f257e8314f14154bb7}{PWR\_CPUCR\_PDDS\_D3}}\ ,\ PDMode);}
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\DoxyCodeLine{01342\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CPUCR\_PDDS\_D2\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{01343\ }
\DoxyCodeLine{01344\ \textcolor{preprocessor}{\#if\ defined\ (DUAL\_CORE)}\textcolor{preprocessor}{}}
\DoxyCodeLine{01353\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_CPU2\_SetD3PowerMode(uint32\_t\ PDMode)}
\DoxyCodeLine{01354\ \{}
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\DoxyCodeLine{01358\ }
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\DoxyCodeLine{01369\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(PWR-\/>CPUCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7939570e266aa5f257e8314f14154bb7}{PWR\_CPUCR\_PDDS\_D3}}));}
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\DoxyCodeLine{01381\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(PWR-\/>CPUCR,\ PWR\_CPUCR\_PDDS\_SRD));}
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\DoxyCodeLine{01383\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CPUCR\_PDDS\_D2\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{01384\ }
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\DoxyCodeLine{01395\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(PWR-\/>CPU2CR,\ PWR\_CPU2CR\_PDDS\_D3));}
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\DoxyCodeLine{01397\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ DUAL\_CORE\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{01398\ }
\DoxyCodeLine{01399\ \textcolor{preprocessor}{\#if\ defined\ (DUAL\_CORE)}\textcolor{preprocessor}{}}
\DoxyCodeLine{01405\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_HoldCPU1(\textcolor{keywordtype}{void})}
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\DoxyCodeLine{01407\ \ \ SET\_BIT(PWR-\/>CPU2CR,\ PWR\_CPU2CR\_HOLD1);}
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\DoxyCodeLine{01409\ }
\DoxyCodeLine{01415\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_ReleaseCPU1(\textcolor{keywordtype}{void})}
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\DoxyCodeLine{01425\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsCPU1Held(\textcolor{keywordtype}{void})}
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\DoxyCodeLine{01427\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CPU2CR,\ PWR\_CPU2CR\_HOLD1)\ ==\ (PWR\_CPU2CR\_HOLD1))\ \ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01428\ \}}
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\DoxyCodeLine{01435\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_HoldCPU2(\textcolor{keywordtype}{void})}
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\DoxyCodeLine{01457\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CPUCR,\ PWR\_CPUCR\_HOLD2)\ ==\ (PWR\_CPUCR\_HOLD2))\ ?\ 1UL\ :\ 0UL);}
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\DoxyCodeLine{01459\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ DUAL\_CORE\ */}\textcolor{preprocessor}{}}
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\DoxyCodeLine{01467\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_CPU\_EnableD3RunInLowPowerMode(\textcolor{keywordtype}{void})}
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\DoxyCodeLine{01549\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CPUCR\_PDDS\_D2\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{01550\ }
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\DoxyCodeLine{01562\ }
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\DoxyCodeLine{01582\ \}}
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\DoxyCodeLine{01596\ \{}
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\DoxyCodeLine{01598\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(PWR-\/>D3CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5566cb64c9ef928873024d23f3721050}{PWR\_D3CR\_VOS}}));}
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\DoxyCodeLine{01600\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(PWR-\/>SRDCR,\ PWR\_SRDCR\_VOS));}
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\DoxyCodeLine{01602\ \}}
\DoxyCodeLine{01603\ }
\DoxyCodeLine{01624\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_EnableWakeUpPin(uint32\_t\ WakeUpPin)}
\DoxyCodeLine{01625\ \{}
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\DoxyCodeLine{01627\ \}}
\DoxyCodeLine{01628\ }
\DoxyCodeLine{01649\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_DisableWakeUpPin(uint32\_t\ WakeUpPin)}
\DoxyCodeLine{01650\ \{}
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\DoxyCodeLine{01652\ \}}
\DoxyCodeLine{01653\ }
\DoxyCodeLine{01674\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsEnabledWakeUpPin(uint32\_t\ WakeUpPin)}
\DoxyCodeLine{01675\ \{}
\DoxyCodeLine{01676\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>WKUPEPR,\ WakeUpPin)\ ==\ (WakeUpPin))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01677\ \}}
\DoxyCodeLine{01678\ }
\DoxyCodeLine{01699\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_SetWakeUpPinPolarityLow(uint32\_t\ WakeUpPin)}
\DoxyCodeLine{01700\ \{}
\DoxyCodeLine{01701\ \ \ SET\_BIT(PWR-\/>WKUPEPR,\ (WakeUpPin\ <<\ PWR\_WKUPEPR\_WKUPP1\_Pos));}
\DoxyCodeLine{01702\ \}}
\DoxyCodeLine{01703\ }
\DoxyCodeLine{01724\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_SetWakeUpPinPolarityHigh(uint32\_t\ WakeUpPin)}
\DoxyCodeLine{01725\ \{}
\DoxyCodeLine{01726\ \ \ CLEAR\_BIT(PWR-\/>WKUPEPR,\ (WakeUpPin\ <<\ PWR\_WKUPEPR\_WKUPP1\_Pos));}
\DoxyCodeLine{01727\ \}}
\DoxyCodeLine{01728\ }
\DoxyCodeLine{01749\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsWakeUpPinPolarityLow(uint32\_t\ WakeUpPin)}
\DoxyCodeLine{01750\ \{}
\DoxyCodeLine{01751\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>WKUPEPR,\ (WakeUpPin\ <<\ PWR\_WKUPEPR\_WKUPP1\_Pos))\ ==\ (WakeUpPin\ <<\ PWR\_WKUPEPR\_WKUPP1\_Pos))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01752\ \}}
\DoxyCodeLine{01753\ }
\DoxyCodeLine{01774\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_SetWakeUpPinPullNone(uint32\_t\ WakeUpPin)}
\DoxyCodeLine{01775\ \{}
\DoxyCodeLine{01776\ \ \ MODIFY\_REG(PWR-\/>WKUPEPR,\ \(\backslash\)}
\DoxyCodeLine{01777\ \ \ \ \ \ \ \ \ \ \ \ \ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3d4d277d03905aeac07b79e81c9af0ac}{PWR\_WKUPEPR\_WKUPPUPD1}}\ <<\ ((LL\_PWR\_WAKEUP\_PINS\_PULL\_SHIFT\_OFFSET\ *\ POSITION\_VAL(WakeUpPin))\ \&\ LL\_PWR\_WAKEUP\_PINS\_MAX\_SHIFT\_MASK)),\ \(\backslash\)}
\DoxyCodeLine{01778\ \ \ \ \ \ \ \ \ \ \ \ \ (LL\_PWR\_WAKEUP\_PIN\_NOPULL\ <<\ ((PWR\_WKUPEPR\_WKUPPUPD1\_Pos\ +\ (LL\_PWR\_WAKEUP\_PINS\_PULL\_SHIFT\_OFFSET\ *\ POSITION\_VAL(WakeUpPin)))\ \&\ LL\_PWR\_WAKEUP\_PINS\_MAX\_SHIFT\_MASK)));}
\DoxyCodeLine{01779\ \}}
\DoxyCodeLine{01780\ }
\DoxyCodeLine{01801\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_SetWakeUpPinPullUp(uint32\_t\ WakeUpPin)}
\DoxyCodeLine{01802\ \{}
\DoxyCodeLine{01803\ \ \ MODIFY\_REG(PWR-\/>WKUPEPR,\ \(\backslash\)}
\DoxyCodeLine{01804\ \ \ \ \ \ \ \ \ \ \ \ \ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3d4d277d03905aeac07b79e81c9af0ac}{PWR\_WKUPEPR\_WKUPPUPD1}}\ <<\ ((LL\_PWR\_WAKEUP\_PINS\_PULL\_SHIFT\_OFFSET\ *\ POSITION\_VAL(WakeUpPin))\ \&\ LL\_PWR\_WAKEUP\_PINS\_MAX\_SHIFT\_MASK)),\ \(\backslash\)}
\DoxyCodeLine{01805\ \ \ \ \ \ \ \ \ \ \ \ \ (LL\_PWR\_WAKEUP\_PIN\_PULLUP\ <<\ ((PWR\_WKUPEPR\_WKUPPUPD1\_Pos\ +\ (LL\_PWR\_WAKEUP\_PINS\_PULL\_SHIFT\_OFFSET\ *\ POSITION\_VAL(WakeUpPin)))\ \&\ LL\_PWR\_WAKEUP\_PINS\_MAX\_SHIFT\_MASK)));}
\DoxyCodeLine{01806\ \}}
\DoxyCodeLine{01807\ }
\DoxyCodeLine{01828\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_SetWakeUpPinPullDown(uint32\_t\ WakeUpPin)}
\DoxyCodeLine{01829\ \{}
\DoxyCodeLine{01830\ \ \ MODIFY\_REG(PWR-\/>WKUPEPR,\ \(\backslash\)}
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\DoxyCodeLine{01832\ \ \ \ \ \ \ \ \ \ \ \ \ (LL\_PWR\_WAKEUP\_PIN\_PULLDOWN\ <<\ ((PWR\_WKUPEPR\_WKUPPUPD1\_Pos\ +\ (LL\_PWR\_WAKEUP\_PINS\_PULL\_SHIFT\_OFFSET\ *\ POSITION\_VAL(WakeUpPin)))\ \&\ LL\_PWR\_WAKEUP\_PINS\_MAX\_SHIFT\_MASK)));}
\DoxyCodeLine{01833\ \}}
\DoxyCodeLine{01834\ }
\DoxyCodeLine{01858\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_GetWakeUpPinPull(uint32\_t\ WakeUpPin)}
\DoxyCodeLine{01859\ \{}
\DoxyCodeLine{01860\ \ \ uint32\_t\ regValue\ =\ READ\_BIT(PWR-\/>WKUPEPR,\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3d4d277d03905aeac07b79e81c9af0ac}{PWR\_WKUPEPR\_WKUPPUPD1}}\ <<\ ((LL\_PWR\_WAKEUP\_PINS\_PULL\_SHIFT\_OFFSET\ *\ POSITION\_VAL(WakeUpPin))\ \&\ LL\_PWR\_WAKEUP\_PINS\_MAX\_SHIFT\_MASK)));}
\DoxyCodeLine{01861\ }
\DoxyCodeLine{01862\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(regValue\ >>\ ((PWR\_WKUPEPR\_WKUPPUPD1\_Pos\ +\ (LL\_PWR\_WAKEUP\_PINS\_PULL\_SHIFT\_OFFSET\ *\ POSITION\_VAL(WakeUpPin)))\ \&\ LL\_PWR\_WAKEUP\_PINS\_MAX\_SHIFT\_MASK));}
\DoxyCodeLine{01863\ \}}
\DoxyCodeLine{01864\ }
\DoxyCodeLine{01868\ }
\DoxyCodeLine{01872\ }
\DoxyCodeLine{01878\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsActiveFlag\_PVDO(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01879\ \{}
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\DoxyCodeLine{01881\ \}}
\DoxyCodeLine{01882\ }
\DoxyCodeLine{01888\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsActiveFlag\_ACTVOS(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01889\ \{}
\DoxyCodeLine{01890\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CSR1,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6c8845e351ae1b92d1e6ec45395102f3}{PWR\_CSR1\_ACTVOSRDY}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6c8845e351ae1b92d1e6ec45395102f3}{PWR\_CSR1\_ACTVOSRDY}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01891\ \}}
\DoxyCodeLine{01892\ }
\DoxyCodeLine{01898\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsActiveFlag\_AVDO(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01899\ \{}
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\DoxyCodeLine{01901\ \}}
\DoxyCodeLine{01902\ }
\DoxyCodeLine{01903\ \textcolor{preprocessor}{\#if\ defined\ (PWR\_CSR1\_MMCVDO)}\textcolor{preprocessor}{}}
\DoxyCodeLine{01909\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsActiveFlag\_MMCVDO(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01910\ \{}
\DoxyCodeLine{01911\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CSR1,\ PWR\_CSR1\_MMCVDO)\ ==\ (PWR\_CSR1\_MMCVDO))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01912\ \}}
\DoxyCodeLine{01913\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CSR1\_MMCVDO\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{01914\ }
\DoxyCodeLine{01920\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsActiveFlag\_BRR(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01921\ \{}
\DoxyCodeLine{01922\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR2,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae3552758eb3c4985410fe8911560f298}{PWR\_CR2\_BRRDY}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gae3552758eb3c4985410fe8911560f298}{PWR\_CR2\_BRRDY}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01923\ \}}
\DoxyCodeLine{01924\ }
\DoxyCodeLine{01930\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsActiveFlag\_VBATL(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01931\ \{}
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\DoxyCodeLine{01933\ \}}
\DoxyCodeLine{01934\ }
\DoxyCodeLine{01940\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsActiveFlag\_VBATH(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01941\ \{}
\DoxyCodeLine{01942\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR2,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaac411ccef055ec95447cd8b736221e06}{PWR\_CR2\_VBATH}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaac411ccef055ec95447cd8b736221e06}{PWR\_CR2\_VBATH}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01943\ \}}
\DoxyCodeLine{01944\ }
\DoxyCodeLine{01950\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsActiveFlag\_TEMPL(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01951\ \{}
\DoxyCodeLine{01952\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR2,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga186c016996c65b07e913e83155082865}{PWR\_CR2\_TEMPL}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga186c016996c65b07e913e83155082865}{PWR\_CR2\_TEMPL}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01953\ \}}
\DoxyCodeLine{01954\ }
\DoxyCodeLine{01960\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsActiveFlag\_TEMPH(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01961\ \{}
\DoxyCodeLine{01962\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR2,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab519388ffad6698f98ada73c4bf81248}{PWR\_CR2\_TEMPH}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gab519388ffad6698f98ada73c4bf81248}{PWR\_CR2\_TEMPH}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01963\ \}}
\DoxyCodeLine{01964\ }
\DoxyCodeLine{01965\ \textcolor{preprocessor}{\#if\ defined\ (SMPS)}\textcolor{preprocessor}{}}
\DoxyCodeLine{01971\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsActiveFlag\_SMPSEXT(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01972\ \{}
\DoxyCodeLine{01973\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR3,\ PWR\_CR3\_SMPSEXTRDY)\ ==\ (PWR\_CR3\_SMPSEXTRDY))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01974\ \}}
\DoxyCodeLine{01975\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ SMPS\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{01976\ }
\DoxyCodeLine{01982\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsActiveFlag\_USB(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01983\ \{}
\DoxyCodeLine{01984\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CR3,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga64e25571a035b217eee2f8d99f5ca20d}{PWR\_CR3\_USB33RDY}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga64e25571a035b217eee2f8d99f5ca20d}{PWR\_CR3\_USB33RDY}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01985\ \}}
\DoxyCodeLine{01986\ }
\DoxyCodeLine{01987\ \textcolor{preprocessor}{\#if\ defined\ (DUAL\_CORE)}\textcolor{preprocessor}{}}
\DoxyCodeLine{01993\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsActiveFlag\_HOLD2(\textcolor{keywordtype}{void})}
\DoxyCodeLine{01994\ \{}
\DoxyCodeLine{01995\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CPUCR,\ PWR\_CPUCR\_HOLD2F)\ ==\ (PWR\_CPUCR\_HOLD2F))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01996\ \}}
\DoxyCodeLine{01997\ }
\DoxyCodeLine{02003\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsActiveFlag\_HOLD1(\textcolor{keywordtype}{void})}
\DoxyCodeLine{02004\ \{}
\DoxyCodeLine{02005\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CPU2CR,\ PWR\_CPU2CR\_HOLD1F)\ ==\ (PWR\_CPU2CR\_HOLD1F))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02006\ \}}
\DoxyCodeLine{02007\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ DUAL\_CORE\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{02008\ }
\DoxyCodeLine{02014\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_CPU\_IsActiveFlag\_STOP(\textcolor{keywordtype}{void})}
\DoxyCodeLine{02015\ \{}
\DoxyCodeLine{02016\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CPUCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3e53d09fb0c22170ff5b37f7587762ec}{PWR\_CPUCR\_STOPF}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3e53d09fb0c22170ff5b37f7587762ec}{PWR\_CPUCR\_STOPF}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02017\ \}}
\DoxyCodeLine{02018\ }
\DoxyCodeLine{02019\ \textcolor{preprocessor}{\#if\ defined\ (DUAL\_CORE)}\textcolor{preprocessor}{}}
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\DoxyCodeLine{02026\ \{}
\DoxyCodeLine{02027\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CPU2CR,\ PWR\_CPU2CR\_STOPF)\ ==\ (PWR\_CPU2CR\_STOPF))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02028\ \}}
\DoxyCodeLine{02029\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ DUAL\_CORE\ */}\textcolor{preprocessor}{}}
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\DoxyCodeLine{02036\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_CPU\_IsActiveFlag\_SB(\textcolor{keywordtype}{void})}
\DoxyCodeLine{02037\ \{}
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\DoxyCodeLine{02041\ \textcolor{preprocessor}{\#if\ defined\ (DUAL\_CORE)}\textcolor{preprocessor}{}}
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\DoxyCodeLine{02048\ \{}
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\DoxyCodeLine{02050\ \}}
\DoxyCodeLine{02051\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ DUAL\_CORE\ */}\textcolor{preprocessor}{}}
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\DoxyCodeLine{02063\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CPUCR\_SBF\_D1\ */}\textcolor{preprocessor}{}}
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\DoxyCodeLine{02074\ \}}
\DoxyCodeLine{02075\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ DUAL\_CORE\ */}\textcolor{preprocessor}{}}
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\DoxyCodeLine{02086\ \}}
\DoxyCodeLine{02087\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CPUCR\_SBF\_D2\ */}\textcolor{preprocessor}{}}
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\DoxyCodeLine{02096\ \{}
\DoxyCodeLine{02097\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>CPU2CR,\ PWR\_CPU2CR\_SBF\_D2)\ ==\ (PWR\_CPU2CR\_SBF\_D2))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02098\ \}}
\DoxyCodeLine{02099\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ DUAL\_CORE\ */}\textcolor{preprocessor}{}}
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\DoxyCodeLine{02109\ \{}
\DoxyCodeLine{02110\ \textcolor{preprocessor}{\#if\ defined\ (PWR\_CPUCR\_PDDS\_D2)}}
\DoxyCodeLine{02111\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>D3CR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga474482bd93a0c1b2924cdb5d528c5948}{PWR\_D3CR\_VOSRDY}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga474482bd93a0c1b2924cdb5d528c5948}{PWR\_D3CR\_VOSRDY}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02112\ \textcolor{preprocessor}{\#else}}
\DoxyCodeLine{02113\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>SRDCR,\ PWR\_SRDCR\_VOSRDY)\ ==\ (PWR\_SRDCR\_VOSRDY))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02114\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PWR\_CPUCR\_PDDS\_D2\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{02115\ \}}
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\DoxyCodeLine{02123\ \{}
\DoxyCodeLine{02124\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>WKUPFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafff4a9218c5dd8a61f6edc1633ea91d1}{PWR\_WKUPFR\_WKUPF6}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gafff4a9218c5dd8a61f6edc1633ea91d1}{PWR\_WKUPFR\_WKUPF6}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02125\ \}}
\DoxyCodeLine{02126\ }
\DoxyCodeLine{02127\ \textcolor{preprocessor}{\#if\ defined\ (PWR\_WKUPFR\_WKUPF5)}\textcolor{preprocessor}{}}
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\DoxyCodeLine{02134\ \{}
\DoxyCodeLine{02135\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>WKUPFR,\ PWR\_WKUPFR\_WKUPF5)\ ==\ (PWR\_WKUPFR\_WKUPF5))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02136\ \}}
\DoxyCodeLine{02137\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ defined\ (PWR\_WKUPFR\_WKUPF5)\ */}\textcolor{preprocessor}{}}
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\DoxyCodeLine{02145\ \{}
\DoxyCodeLine{02146\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>WKUPFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0c527dcba2e6b9184b62691c6c7984c4}{PWR\_WKUPFR\_WKUPF4}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0c527dcba2e6b9184b62691c6c7984c4}{PWR\_WKUPFR\_WKUPF4}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02147\ \}}
\DoxyCodeLine{02148\ }
\DoxyCodeLine{02149\ \textcolor{preprocessor}{\#if\ defined\ (PWR\_WKUPFR\_WKUPF3)}\textcolor{preprocessor}{}}
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\DoxyCodeLine{02156\ \{}
\DoxyCodeLine{02157\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>WKUPFR,\ PWR\_WKUPFR\_WKUPF3)\ ==\ (PWR\_WKUPFR\_WKUPF3))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02158\ \}}
\DoxyCodeLine{02159\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ defined\ (PWR\_WKUPFR\_WKUPF3)\ */}\textcolor{preprocessor}{}}
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\DoxyCodeLine{02167\ \{}
\DoxyCodeLine{02168\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>WKUPFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga703c5e67341ec2a5dbe3d01c32e70d49}{PWR\_WKUPFR\_WKUPF2}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga703c5e67341ec2a5dbe3d01c32e70d49}{PWR\_WKUPFR\_WKUPF2}}))\ ?\ 1UL\ :\ 0UL);}
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\DoxyCodeLine{02176\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_PWR\_IsActiveFlag\_WU1(\textcolor{keywordtype}{void})}
\DoxyCodeLine{02177\ \{}
\DoxyCodeLine{02178\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(PWR-\/>WKUPFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacd3e1821b5493f98f758bef31203d9d4}{PWR\_WKUPFR\_WKUPF1}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gacd3e1821b5493f98f758bef31203d9d4}{PWR\_WKUPFR\_WKUPF1}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02179\ \}}
\DoxyCodeLine{02180\ }
\DoxyCodeLine{02186\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_ClearFlag\_CPU(\textcolor{keywordtype}{void})}
\DoxyCodeLine{02187\ \{}
\DoxyCodeLine{02188\ \ \ SET\_BIT(PWR-\/>CPUCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga852ddeb6ccda1c58d5674b856b122b17}{PWR\_CPUCR\_CSSF}});}
\DoxyCodeLine{02189\ \}}
\DoxyCodeLine{02190\ }
\DoxyCodeLine{02191\ \textcolor{preprocessor}{\#if\ defined\ (DUAL\_CORE)}\textcolor{preprocessor}{}}
\DoxyCodeLine{02197\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_ClearFlag\_CPU2(\textcolor{keywordtype}{void})}
\DoxyCodeLine{02198\ \{}
\DoxyCodeLine{02199\ \ \ SET\_BIT(PWR-\/>CPU2CR,\ PWR\_CPU2CR\_CSSF);}
\DoxyCodeLine{02200\ \}}
\DoxyCodeLine{02201\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ DUAL\_CORE\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{02202\ }
\DoxyCodeLine{02208\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_ClearFlag\_WU6(\textcolor{keywordtype}{void})}
\DoxyCodeLine{02209\ \{}
\DoxyCodeLine{02210\ \ \ WRITE\_REG(PWR-\/>WKUPCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae2163c159213a47b5aa6c498c8257e0c}{PWR\_WKUPCR\_WKUPC6}});}
\DoxyCodeLine{02211\ \}}
\DoxyCodeLine{02212\ }
\DoxyCodeLine{02213\ \textcolor{preprocessor}{\#if\ defined\ (PWR\_WKUPCR\_WKUPC5)}\textcolor{preprocessor}{}}
\DoxyCodeLine{02219\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_ClearFlag\_WU5(\textcolor{keywordtype}{void})}
\DoxyCodeLine{02220\ \{}
\DoxyCodeLine{02221\ \ \ WRITE\_REG(PWR-\/>WKUPCR,\ PWR\_WKUPCR\_WKUPC5);}
\DoxyCodeLine{02222\ \}}
\DoxyCodeLine{02223\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ defined\ (PWR\_WKUPCR\_WKUPC5)\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{02224\ }
\DoxyCodeLine{02230\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_ClearFlag\_WU4(\textcolor{keywordtype}{void})}
\DoxyCodeLine{02231\ \{}
\DoxyCodeLine{02232\ \ \ WRITE\_REG(PWR-\/>WKUPCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga223b7bd00095a8b2e4fdaa8acb7e35d8}{PWR\_WKUPCR\_WKUPC4}});}
\DoxyCodeLine{02233\ \}}
\DoxyCodeLine{02234\ }
\DoxyCodeLine{02235\ \textcolor{preprocessor}{\#if\ defined\ (PWR\_WKUPCR\_WKUPC3)}\textcolor{preprocessor}{}}
\DoxyCodeLine{02241\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_ClearFlag\_WU3(\textcolor{keywordtype}{void})}
\DoxyCodeLine{02242\ \{}
\DoxyCodeLine{02243\ \ \ WRITE\_REG(PWR-\/>WKUPCR,\ PWR\_WKUPCR\_WKUPC3);}
\DoxyCodeLine{02244\ \}}
\DoxyCodeLine{02245\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ defined\ (PWR\_WKUPCR\_WKUPC3)\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{02246\ }
\DoxyCodeLine{02252\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_ClearFlag\_WU2(\textcolor{keywordtype}{void})}
\DoxyCodeLine{02253\ \{}
\DoxyCodeLine{02254\ \ \ WRITE\_REG(PWR-\/>WKUPCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacff74d63fa86695d3eed64c759eb5bed}{PWR\_WKUPCR\_WKUPC2}});}
\DoxyCodeLine{02255\ \}}
\DoxyCodeLine{02256\ }
\DoxyCodeLine{02262\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_PWR\_ClearFlag\_WU1(\textcolor{keywordtype}{void})}
\DoxyCodeLine{02263\ \{}
\DoxyCodeLine{02264\ \ \ WRITE\_REG(PWR-\/>WKUPCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab3f7106e80257d68575ec69d4ba3df1b}{PWR\_WKUPCR\_WKUPC1}});}
\DoxyCodeLine{02265\ \}}
\DoxyCodeLine{02266\ }
\DoxyCodeLine{02267\ \textcolor{preprocessor}{\#if\ defined\ (USE\_FULL\_LL\_DRIVER)}\textcolor{preprocessor}{}}
\DoxyCodeLine{02271\ ErrorStatus\ LL\_PWR\_DeInit(\textcolor{keywordtype}{void});}
\DoxyCodeLine{02275\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ defined\ (USE\_FULL\_LL\_DRIVER)\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{02276\ }
\DoxyCodeLine{02277\ }
\DoxyCodeLine{02281\ }
\DoxyCodeLine{02285\ }
\DoxyCodeLine{02289\ }
\DoxyCodeLine{02290\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ defined\ (PWR)\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{02291\ }
\DoxyCodeLine{02295\ }
\DoxyCodeLine{02296\ \textcolor{preprocessor}{\#ifdef\ \_\_cplusplus}}
\DoxyCodeLine{02297\ \}}
\DoxyCodeLine{02298\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{02299\ }
\DoxyCodeLine{02300\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ STM32H7xx\_LL\_PWR\_H\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{02301\ }

\end{DoxyCode}
